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LFrin's avatar
LFrin
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
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Arria 10: Booting U-Boot from SD-Card does not configure FPGA

Hello, I have adapted the example for the Arria 10 SOCDK (Arria 10 SoC - Boot from SD Card) to the HAN-Pilot-Platform evaluation board from Terasic. I used the make_sdimage_p3.py script to generat...
  • LFrin's avatar
    LFrin
    3 years ago

    Hi @aikeu,

    okay, now im sure: The Intel In-System Sources and Probes IP hinders the FPGA from starting normally after it has been correctly configured by SD-Card. Even the old Quartus-Project works without the ISSP-IP. Now it makes sense why the FPGA starts when a connection to the programmer is established via JTAG or similar.

    My workaround will be, that i only use FPGA Firmware without the debugging features (ISSP, SignalTap, ...) on the SD-Card and when i need this debugging features i will start the HPS with the ARMD DS debugger.

    Thanks for the help, my problem has been solved.

    Regards,

    LFrin

LFrin's avatar
LFrin
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Hi @aikeu,

yes.

I packed the SD-Card like i wrote in the first post:

I have adapted the example for the Arria 10 SOCDK (Arria 10 SoC - Boot from SD Card) to the HAN-Pilot-Platform evaluation board from Terasic. I used the make_sdimage_p3.py script to generate the SD-Card image without linux binaries:

Partition 3: (format raw, type 0xA2) - u-boot-splx4.sfp
Partition 1: (format fat) - sdfs folder with - fit_spl_fpga.itb and u-boot.img
Partition 2: (format ext3) - empty

First I thought the SD-Card is booting normally, but the FPGA is not configured.

Then I noticed that when I do a reset using ARM-DS-Debugger-Script (connect stop reset stop) the FPGA starts running, which means the FPGA is configured when booting from SD-Card, but it does not start running.

Then again I noticed that it doesn't need a reset executed with the ARM-DS-Debugger, but only an event on the JTAG bus like an auto-discover from the Quartus programmer to start running.

I have not analyzed this further. On the evaluation board I used (HAN-Pilot-Platform) there is an on-board USB-Blaster II and it seems that this prevents the FPGA from starting properly, but I can't explain why. Also, I don't know why the sample SD-Card created with Quartus-Prime 18.1 Standard works. So it could still have something to do with my FPGA design?

Is there anything special to consider in the FPGA design when working with the HPS (resets clocks etc.), besides the correct initialization of the HPS component and the emif?

Regards LFrin