ARRIA 10 Bidir GPIO Synthesis error

Hi ,

I try to instantiate a tri-state buffer using the GPIO IP CORE . Although i assume that i had made all the connection correct the synthesis stage outcomes this error

Error(17044): Illegal connection on I/O input buffer primitive i2c_test|gpio_0|core|i_loop[0].altera_gpio_bit_i|input_buffer.ibuf. Source I/O pin i2c_test|pad_io[0] drives out to destinations other than the specified I/O input buffer primitive. Modify your design so the specified source I/O pin drives only the specified I/O input buffer primitive.

The connections that i had in the top level design are the following

inout wire tri_buff;

i2c_bidir u0 (
.dout (),
.din (),
.oe (),
.pad_io ( tri_buff)
);

the tri_buff signal does not drive any other destination and i cannot understand why the above error occurs

Thanks in advance