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Altera_Forum
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8 years ago

Arria 10 auto configuration issue with EPCQ-L

Hi experts,

I come across a serious issue on my Arria 10 board, using 10AX016C4. Flash memory is EPCQ-L256

When I wrote program using jic-file with USB Blaster 2, some jic-file, call as "A.jic" here in after, caused auto configuration issue.

Once programming and verify have completed successfully, but after power off-on, auto configuration failed. Configuration has not done, and this was mysterious symptom though , JTAG-TDO port has become TDI through port, no clock delay, exact same with TDI.

As I cannot use JTAG port, because TDO doesn't run correctly, I erased EPCQ-L by Active Serial port. Then TDO port became Hi-Z correctly after next Power off-on. And I wrote A.jic again, the result was same, TDO fail.

But I wrote another jic-file, call as "B.jic" here in after, then auto configuration has done and my program in Arria 10 ran correctly. After that, I write A.jic file again, then auto configuration has done and my program ran correctly. And after that A.jic file writing has been always fine.

I have three boards, and I checked two boards ran correctly by this writing manner above, writing B.jic. And I still have one failed board, not writing B.jic.

I extracted program data from EPCQ-L by Examine function via Active serial port, and I found each pof-files in three boards, two fine and one fail, were exact same. So I believe program file in EPCQ-L and EPCQ-L itself should be fine.

It looks 10AX016C4 issue, but very strange symptom.

Does anyone have any idea?

Thanks,

Tetsuya

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  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Hi nyusof,

    Thank you for inquire.

    I have erased EPCQL by Quartus programmer's erase function via AS port before writing. Is there any other "full" erase function?

    The revisions of building programmer are different among A.jic and B.jic.

    A.jic was built on Standard edition 16.1.1, a bit old, and B.jic was built on Lite edition 17.0.0.

    And checking the both of jic files by Binary editor, there is some difference. Behind the first header, describes Quartus revision, device type and so on, it appears "6A 6A 6A 6A". And before this unique code,

    A.jic describes "FF FF FF FF ... FF FF 6A 6A 6A 6A".

    B.jic describes "... C1 9E CE 1E E1 FC 2A 00 6A 6A 6A 6A". (not FF FF...)

    As I have no idea about jic file data format, I couldn't see the meaning of this difference.

    And my point of view on this issue.

    1. Can jic-file (or pof-file in EPCQL) control JTAG-TDO port on the way of auto configuration?

    2. Is it possible to make TDI though out mode on TDO, without shift clock delay?

    3. Why does it run correctly even on A.jic after writing B.jic?

    Regards,

    Tetsuya
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    Hi Tetsuya,

    Did you try to perform a full erase to the EPCQL256 first before programming any .jic file? Is there any difference in the between A.jic file and B.jic file? Perhaps you can check the project design settings between A.jic file and B.jic file.

    Regards,

    nyusof

    (This message was posted on behalf of Intel Corporation)