Array Problem

I think the compiler has a problem to synthesize a Ram because of following code:

if CAM_DATA >= array_amp_max(counter) then
. . .
out_amp_max   <= array_amp_max(counter);
. . .  

In these lines you are asking from the MLAB RAM to deliver a result in one clock cycle, which it can't. The Read Address is first registered before being applied to the RAM-cells, which delays the result by one clock cycle. So the compiler uses logic cells to build that section, requiring 1280 * 8 LEs per array. I suggest you read about the internal RAM blocks.

I never have the compiler infer a RAMs for me, I always either use the MegaWizard, but most often I instantiate a RAM component directly (peeking into what the MegaWizard generates helps to understand what generics to apply).