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DMcLa3's avatar
DMcLa3
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7 years ago

Are there any special sequences or other requirements to get MAX10 to respond to JTAG ?

Our design has a MAX10 (10M16SCU) and we would like to program it with JBC for field updates. We have been unable to get the embedded player software to work. For debug, we fell back to a simple t...
ShafiqY_Intel's avatar
ShafiqY_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago
Hi, For TCK frequency, Can you make it a little bit faster? 250kHz is too slow. Do you mean you want to do JTAG boundary-scan testing (BST)? You may refer to the following user guide for JTAG BST. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_jtag.pdf As far as I know, Max 10 do not need to loads its id code. Only JTAG ID is needed for verify process. The following are the recommended flow to program MAX 10: 1. Check ID—the JTAG ID is checked before any program or verify process. The time required to read this JTAG ID is relatively small compared to the overall programming time. 2. Enter ISP—ensures the I/O pins transition smoothly from user mode to the ISP mode. 3. Sector Erase—shifting in the address and instruction to erase the device and applying erase pulses. (UFM and DSM sectors) 4. Program—shifting in the address, data, and program instructions and generating the program pulse to program the flash cells. This process is repeated for each address in the internal flash sector. (UFM and/or DSM sector) 5. Verify—shifting in addresses, applying the verify instruction to generate the read pulse, and shifting out the data for comparison. This process is repeated for each internal flash address. (UFM and DFM sector) 6. Exit ISP—ensures that the I/O pins transition smoothly from the ISP mode to the user mode. Thanks.
DMcLa3's avatar
DMcLa3
Icon for New Contributor rankNew Contributor
7 years ago

Thanks for your reply.

We are not trying to do BST. We just had problems getting the JBC programmer working on our processor and thought we would try a few simple tests to see what is wrong.

The first test we tried was to read the IDCODE, thinking that is very basic. What we found was that the MAX10 did not respond at all. No TDO output when we try to use our embedded processor.

The JTAG chain on our design is minimal: just the MAX10 device in the chain. The JTAG pins go to a header and also to the processor.

The Altera cable works fine with the MAX10 , but the CPU does not. We can use SignalTap and program the logic without any incident.

We have verified several times that the CPU is not interfering with operation. This is the first place we looked, then looked twice again.

We looked at the timing when the Altera bitblaster reads the IDCODE and verified both our timing and protocol.

The signals also have good quality from the CPU with no overshoot, ringing or non-monotonic behavior. Power is good and within spec .

Despite all this, the max10 is unresponsive to the JTAG when driven by our CPU. I have spent may hours reviewing documentation and anything I can find on the support site and web. Nothing seems to give any hint.

Any ideas?

Thanks for your help .