applied counter at use verilog hdl in quartus II on board Cyclon II

ok iwill remove ena

module counter

(

clk,

reset,

result,

ena

);

input clk;

input reset;

output [3:0] result;

reg [3:0] result;

always @(posedge clk or posedge reset)

begin

if (reset)

result = 0;

else result = result + 1;

end

endmodule

now you know de2 board it's has 4 poshbutton I want press poshbutton just one time or only press button at firs count after that the count increase number from 0 to 15 between 0 and 1 for exam 50ns ok .

I don't like press button all time.

Are you anderstand me now?