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Honored ContributorApparent Reset Glitch on Synchronous Reset
While running SW tests, at random times it looks like all my internal registers are getting cleared to their reset values. This is true for both registers and SOPC modules. Depending on the SW I ru...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- process (areset, clk, cnt) begin if areset = '1' then cnt <= 0; elsif cnt = RESET_VAL-1 then cnt <= 0; elsif clk = '1' and clk 'event then if ena = '1' then cnt <= cnt + 1; end if; end if; end process; --- Quote End --- I would be careful not to deviate from the template: process (areset, clk) begin if areset = '1' then --async initializations with constants elsif clk = '1' and clk 'event then if ena = '1' then -- sync assignments end if; end if; end process;
