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Altera_Forum
Honored Contributor
12 years agoanalysis and optimization problem
Hello every body; During the analysis and optimization of my project on Quarts 12, I found that there are some registers are removed and the reason are " Stuck at GND due to stuck port data_in "...
Altera_Forum
Honored Contributor
12 years agoclk and reset signals are exported and not connected to other signals. unless the system in a simulation phase, they connected to a generated clk and reset brought to high.