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GD76's avatar
GD76
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

altsyncram file for Modelsim Simulation

In Platform Designer, I have dual port RAM. In Modelsim, I have the verilog Block RAM file. That file calls altsyncram. In simulation, I have test bench and the verilog block RAM file. Where do I fin...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi,

Since I had provided you the solution and did not received any feedback from you, I shall set this case to close pending. If you still need further assistance, you are welcome reopen this case within 20days or open a new case, some one will be right with you.

Best regards,
Sheng

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.