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Altera_Forum
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10 years ago

ALTPLL multiplication factor

Hi, I have 100 MHz clock source directly connected to FPGA (Aria V device), using this I want to generate 250 MHZ clock from FPGA. Is ALTPLL IP suitable for this requirement? Pls suggest. And a...
Altera_Forum's avatar
Altera_Forum
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10 years ago

Just to add that the PLL output frequency to the core logic might be lower than the external clock output. You may double check on the datasheet.