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Altera_Forum's avatar
Altera_Forum
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10 years ago

ALTPLL multiplication factor

Hi, I have 100 MHz clock source directly connected to FPGA (Aria V device), using this I want to generate 250 MHZ clock from FPGA. Is ALTPLL IP suitable for this requirement? Pls suggest. And a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

The Arria V PLL output frequency can go up to 500MHz in the slowest speed grade for external clock output. So the 250MHz should not be an issue.