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kikoss's avatar
kikoss
Icon for Occasional Contributor rankOccasional Contributor
1 year ago
Solved

ALTLVDS TX IP - pin location constraints

Hello I Instantiated on my design an ALTLVDS TX module for agilex7 , and the compilation passed This ALTLVDS TX module output 4 differential ports (configured to 192Mbps each one ) + 1 diffe...
Generic Io
  • FvM's avatar
    FvM
    1 year ago

    Hi,
    did you assign LVDS IO standard? Did you try to assign explicite pin locations for differential pairs? You only need to assign positive pins, negative pin will be assigned by fitter automatically.

kikoss's avatar
kikoss
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Hello

You right , need to set IO standard , seems quartus use default for ALTLVDS RX IP but not for ALTLVDS TX IP

Here is the standard I set :


set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to CLKINP -entity safety_top_level
set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to TX_LVDS_ADC_2P -entity safety_top_level
set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to TX_LVDS_ADC_3P -entity safety_top_level

THX