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Altera_Forum
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16 years ago

ALTLVDS input bit being shifted too soon.

Hi, I am trying to setup ALTLVDS on a Stratix IV GX part. When simulating it I see that on every alternate cycles, the serial bit is shifted in too soon. Please see the attached image. I am ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

To understand a possible error, I would like to see the frameclock and the deserialized output data. Otherwise I'm unable to see the word boundary and determine if there is an error at all.