Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi Swami,
Thanks for the advise you gave me. I took a look on the document you told me , and yes it is showing clearly how it is connected the Rom blocks with the mux. But i have seen that this example is about how to generate different .mif files for using them with ALTPLL Megafunction. After reading that document, my doubts now are the next ones. It is possible to implement the same design but instead of using ALTPLL function use ALTGX??? How to connect the clock of ALTGX?, becausse the clock that is running the transceiver (ALTGX) is std_logic_vector (0 downto 0) and the one generated by ALTPLL_RECONFIG is std_logic? I have been reading and i have found another examples that maybe are of your interest: - "Implementing Dynamic Reconfiguration in Cyclone IV Device" : in the page 14 is an explanation of how to create .mif files, but now for using them with ALTGX. - "ALTPLL_RECONFIG manual" : example of how to generate different pll's (similar to the one you told me) Thanks, Regards, Lucia