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Altera_Forum
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12 years ago

Altera PLL cascading

Hi. I'm using Cyclone V E. I have 2 PLLs in project. Can I use a pll cascading feature in this FPGA? Why I can't just connect PLL's one output outclk0 with refclk of PLL two? Whe...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hmm, somewhere you're connecting something terribly wrong. Did you try this:

https://www.alteraforum.com/forum/attachment.php?attachmentid=8608

I did a small testdesign and configured the PLLs like that and had no problems compiling it.

Unfortunately I can't test it in hardware because I don't have a Cyclone V.