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Altera_Forum
Honored Contributor
Honored ContributorAltera On-Chip Flash IP Core
I've included Altera On-Chip Flash IP Core in my project. The core created a component
component flash_update is
port (
clock : in std_logic ...
Altera_ForumHonored Contributor
Honored ContributorWell...To compile successfully the Qsys and the project should be configured as Single Compressed Imaged. I don't know how it would impact the project. Have to try.
