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Altera_Forum
Honored Contributor
Honored ContributorAltera_mm_interconnect functionality
Hi All, I have 256 bit input data and 64 bit address in input side of mm_interconnect. In output side 256 bit data and 30 bit address. How this altera_mm_ interconnect tran...
Altera_ForumHonored Contributor
Honored ContributorTransfer sizes are based on the data width, not the addressing. So if your data is 256 bits on both the master and slave sides, it will take two cycles to perform two writes, barring any latency options or pipeline settings.
