Forum Discussion
GLees
Contributor
3 years agoALTDDIO_IN Seems Slow
I'm designing a deserializer in Cyclone V and see something strange with a simple ALTDDIO_IN megafunction;
If I leave the clock and data_in ports unassigned the timing analyzer states an Fma...
Nurina
Regular Contributor
3 years agoHello,
So you've assigned the pin?
Is it possible that you've seen the Critical Warning mentioned in this KDB: https://www.intel.com/content/www/us/en/support/programmable/articles/000076713.html
May I know which Quartus version you're using?
Thanks,
Nurina