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Altera_Forum
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16 years ago

[AHDL] Problem with MUX

I am a newbie to Quartus and AHDL. I have problem with multiplexer 3 in 1 out. When I simulate I get for 0 and 1 signal A, for 2 signal B, for 3 signal C. SUBDESIGN mux_3_8bit_1 ( A, B, ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I must use AHDL, because this is requirment of project.

During simulation i get a lot of warning. for example:

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Warning: Found glitch at time 0.5 ns of duration 0.5 ns on node "|mux_3_8bit_1|A[0]"

...

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