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HI51's avatar
HI51
Icon for New Contributor rankNew Contributor
11 months ago

Agilex5のHVIOバンクのピンの状態および最大周波数について

・Agilex5のHVIOバンクの電源起動後のピンの状態について教えてください　 電源起動後、コンフィギュレーション中のユーザーモードに入るまでのピンの状態を教えてください。「General-Purpose I/O User Guide: Agilex 5 FPGAs and SoCs」では「All pins are tri stated.」と記述があり、プルアップ、プルダウン抵抗なしの状態...
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
11 months ago

I hope the previous response was sufficient to help you proceed. As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


  • HI51's avatar
    HI51
    Icon for New Contributor rankNew Contributor
    11 months ago

    Hello, thank you for your cooperation

    You mentioned that the pins on the HVIO bank are in a weak pull-up state during configuration. Does this mean that I need to pay attention to this state on the connected device? Or is it just a high resistance pull-up that doesn't require attention? I've seen cases where the startup setting for some controlling CPUs is a weak pull-down (tens of kilohms).