Forum Discussion
Agilex 7 interface with DDR4
Hi sstrell,
Thanks for coming back to me.
I have gone through the links you provided long before I decided to post my question here.
I am not sure. But if you think the links you provided is able to help, why not you try them and make a working project and load into the Agilex 7 board you have and see if you can read write on DDR4 through your Linux application program. Say we write 500MB of data to the DDR4 and read back. It has to go through the bridges you have created using the EMIF in the documents in the links you provided.
Could you please try that?
Regards,
- sstrell2 years ago
Super Contributor
I don't have the hardware for this. I'm going by my experience with the IP and tools and implementation of EMIF on other devices. And I run in Windows, not Linux. You still don't mention if this is a dev kit or your own custom board.
- nelky2 years ago
Occasional Contributor
Hi sstrell,
I am using the board designed based on a development kit.
To quote you...
"If it's a dev kit, you can select the board when creating the Quartus project and then generate the example design from the EMIF IP parameter editor."
"If you are not using a dev kit and this is your own custom board, you can (and should) still create an example design and use that for testing."
Whether or not it is dev kit, does it matter? Still we need to create example design, right?
Do the documents, that say creating example from the EMIF IP, work?
My thinking is that if the documents says it is working, there should be some sample project that can support and show it is working. Instead, we need to read all the documents and test it and to tell if the documents are valid, working theoretically. But I think, theoretically, it is working. Practically, something is missing, causing it doesn't work.
Am I right to say that?
Frankly, I have tried almost all documents and video clips, be it DDR4, EMIF, etc. Yet, none works... It is either failing at the generate part at the Platform Designer or at the compilation part at Quartus Prime Pro. In short, it all fails...
Sigh...I may have overlooked something. That's why I need some experts here to guide me.
The requirement here sounds simple, Bringing up the internal bridges in Agilex 7 so that at the Linux application side, it can read from and write to the DDR4.
But when implementing it, it's not that simple.
It's quite funny when I asked people around me. They either know the FPGA part or the SoC part. None knows both combination. Some suggested using UART or SPI to access to the DDR4. But it's slower. It doesn't make sense since the internal bridges are there. We need to bring up the internal bridges to access to the DDR4. It is faster, right? But how to bring up the internal bridges to achieve this?
I even thought of writing my own AXI4 signals to access to the DDR4. But there are 2 obstacles here.
One is how to write the AXI4 signals itself, for sure.
The second one is that even this can be achieved, at the Linux side, it will have problem accessing it since there is no memory-mapped addresses to access the DDR4, like the one generated by Avalon-mm.
Could someone please help?
Regards,
Regards,
- sstrell2 years ago
Super Contributor
Since this is a custom board, forget about the bridges and the HPS for now. You're taking on too much at once. If it was a dev kit, the GHRD would have been sufficient. That's why I said that it makes a difference what board you're using. Create an example design in the EMIF IP Parameter editor for your EMIF design. This creates an entire Quartus project including a traffic generator for testing. Use Interface Planner (or just the Pin Planner) to place the I/O appropriately for your board. That seems to be your biggest issue at this point, and the training and EMIF IP user guide goes into detail on how to do this.
Once you've got the EMIF working, you can then move on to adding the HPS into the mix since you will have all the I/O locations and EMIF parameters set correctly and you'll know they are working. Add it to the example design project created by the EMIF IP Parameter editor or create a new project and copy over all the settings and parameters.