Hello Aqid,
thanks for your answer, but it seems you didn't understand my question, so I will try to rephrase it.
DS (datasheet for Agilex 5 DS-813918 | 2025.01.23) on page 48 in Table 38 specifies Vod and Vocm for SLVS400 standard. Vod an Vocm are (based on Table 114 on page 172) output parameters - diff. swing and common mode voltage. From this I conclude, that Agilex 5 HSIO bank is capable of SLVS400 output functionality. Is that conclusion correct?
I was able to find three ways of using IOs of Agilex 5 in quartus - via LVDS Serdes, via PHY Lite and as GPIO. As I already mentioned I studied documentation and found that PHY Lite doesn't mention SLVS400 at all, LVDS Serdes can implement only inputs in SLVS400 standard and (as you verified) GPIO mode doesn't support SLVS400 mode. So my second question: How can I implement SLVS400 output?
Is now clear what I am asking about?
Thanks
Marek