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TK99's avatar
TK99
Icon for New Contributor rankNew Contributor
11 months ago

Agilex 5 LVDS Serdes (Serdes factor 7 and 504Mbit/s valid?)

Hello, I used A10 and C10GX devices to implement a LVDS Serdes with 504MBit/s and a 1:7 ratio. This is common interface towards LCD Panels (HD). We are looking forward to use an Agilex 5 device f...
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FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
11 months ago

Hi,
despite of beeing able to compile 504 MBPS SERDES in FPGA fabric with SDR clock, I basically agree that Agilex 5 SERDES features are diasppointing, even compared to low cost FPGA series like Cyclone 10 GX. The lack of standard SERDES widths, e.g. 10 commonly used for 8b/10b encoded data makes it unsuitable for many standard communication applications.

Regards

Frank