Occasional ContributorAgilex 5 E-Series Ethernet with 1588 via HPS EMAC
Good day,
I would like to use the Hard Processor System (HPS) Ethernet Media Access Controller (EMAC) peripheral (with IEEE 1588) for a Gigabit Ethernet (GbE) port. I found the information for this in the Hard Processor System Technical Reference Manual - Agilex 5 SoCs (814346).
I will use an external PHY and SGMII Interface. I would thus route the signals through the FPGA IOs. Should I use the HSIOs or a Transceiver for the SGMII signals?
How should the MDIO signals be routed? the PHYs I use allow for up to 16 PHYs to be connected via one MDIO bus. Is it possible to combine a non-HPS and HPS GbE port over the same MDIO bus? The PHYs will have different addresses. How should I then route this bus?
Do I still need to use the Triple-Speed Ethernet IP when I use the EMAC?
Hi,
Aik Eu is OOO.
Yes you can use the SGMII and SGMII+ using soft logic with the appropriate general purpose, TDS, or transceiver I/O resources. Reference-https://www.intel.com/content/www/us/en/docs/programmable/814346/24-1/phy-interface-01.html
You can also route the MDIO pin to FPGA and with shared MDIO interface for multiple PHY devices and their configuration and management.
Regards
Tiwari
