Agilex 5 - HPS first - u-boot stuck if rebooting

Hi,

my changes in u-boot are:

1) environement (printenv snippet)

bootcmd_mmc0=bridge enable 0x3b; devnum=0; run mmc_boot
fitfpga=load mmc 0:1 $loadaddr d/design.core.rbf ; dcache flush ; bridge disable ; fpga load 0 $loadaddr $filesize ; bridge enable 0x3b;

2) in uboot. txt in u-boot script generation from previous

if test ${target} = "mmc0"; then
  if test -e ${devtype} ${devnum}:${distro_bootpart} /${bootfile}; then
    echo "Found kernel in mmc0";
    mmc rescan;
    mw.l 10d13224 14;
    mw.l 10d13228 14;
    mw.l 10d1323c 14;
    mw.l 10d13234 14;
    mw.l 10d13248 14;
    mw.l 10d1324C 14;
    mw.l 0x10D11028 0x01027fb0 1;
    mw.l 0x10c03304 0x410 1;
    mw.l 0x10c03300 0x00000410;
    mw.l 0x10c03300 0x00000000;
    mw.l 0x10c03300 0x00000410;
    bridge enable;
    mw.l 0x028000070 0x00000000;
    mw.l 0x28000070 0x00000001;
    fatload mmc 0:1 ${loadaddr} ${bootfile};
    setenv bootargs "bootargs console=ttyS0,115200 root=${mmcroot} rw rootwait mem=768M";
    bootm ${loadaddr};
    exit;
  fi
fi

to

if test ${target} = "mmc0"; then
  mw.l 10d13224 14;
  mw.l 10d13228 14;
  mw.l 10d1323c 14;
  mw.l 10d13234 14;
  mw.l 10d13248 14;
  mw.l 10d1324C 14;
  mw.l 0x10D11028 0x01027fb0 1;
  mw.l 0x10c03304 0x410 1;
  mw.l 0x10c03300 0x00000410;
  mw.l 0x10c03300 0x00000000;
  mw.l 0x10c03300 0x00000410;
else
    echo "mmc0 not found!"
fi

to allow programm core.rbf after - in linux via devicetree overlay.

Behavior of programm core.rbf multiple times is same if I run "run fitfpga" in u-boot multiple times or if I programm it in linux via device-tree overlay (first time it always works, second time usually even FPGA logic is not working, third time sometimes FPGA logic is working, but HPS2FPGA bridge usage usually hangs HPS).

I tried to disable F2H in bridge enable command in u-boot and also in GHRD design (we don't need it), but it did not help to solve this problem. Please could you check our design project, if it is disabled correctly in our design?

Is possible to reset the board remotely (by some command), like I touch NCONFIG button or switch power, to avoid this problem?

If I reboot board form linux now, FPGA fabric remains programmed and second programming triggers the problem. I have to manually push the NCONFIG button then to succesfully reboot the board.