Forum Discussion
MM-ATH
Occasional Contributor
1 year agoSo the simplest example
AXE5_EAGLE # run fitfpga 2568192 bytes read in 125 ms (19.6 MiB/s) ...FPGA reconfiguration OK! AXE5_EAGLE # md.l 0x028000070 1 28000070: 00000000 .... AXE5_EAGLE # run fitfpga 2568192 bytes read in 124 ms (19.8 MiB/s) ...FPGA reconfiguration OK! AXE5_EAGLE # md.l 0x028000070 1 <here it freezes>
fitfpga is defined as:
fitfpga=load mmc 0:1 $loadaddr d/design.core.rbf ; dcache flush ; fpga load 0 $loadaddr $filesize ; bridge enable;
MM-ATH
Occasional Contributor
1 year agoat 0x02800070 should be FPGA register - USB switch reset register.
So it seems that LWH2F bridge not work, if fpga.core is fitted twice.
Other addresses from LWH2F bridge address pool does not work too (also stucks uboot).