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Nicole04's avatar
Nicole04
Icon for Occasional Contributor rankOccasional Contributor
11 months ago

Agilex™ 5 EMIF IP for Hard Processor Subsystem (HPS) in Quartus 24.3.1

Good day, I had a working EMIF IP set up and connected to the HPS in Quartus 24.2. I then upgraded to Quartus 24.3.1 and now can no longer get the EMIF IP to compile without errors. I replaced the o...
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Nicole04's avatar
Nicole04
Icon for Occasional Contributor rankOccasional Contributor
10 months ago

Hi Adzim,

The width error seems to be fixed in the Quartus 25.1 version.

I do however still get the inclusion error. I have tried regenerating the IP, cleaning the project and regenerating again, but the error persists. The included file does exist.

Error(16827): Verilog HDL error at emif_io96b_hps_0_emif_io96b_hps_300_4hwut5y_emif_0_lpddr4_emif_io96b_lpddr4_300_ljjag6i.sv(17): cannot open include file emif_io96b_interface.svh

Kind regards,

Nicole

Nicole04's avatar
Nicole04
Icon for Occasional Contributor rankOccasional Contributor
10 months ago

I was able to get a temporary work around, but hopefully this can be fixed in the future.

I was able to compile the design when the path is made shorter. I had to place my quartus folder directly on the C drive of my PC, because the path for the LPDDR4 EMIF IP is very long.

Is there a way to shorten the names used in the IP folders?