Forum Discussion
Nicole04
Occasional Contributor
Occasional ContributorAgilex™ 5 EMIF IP for Hard Processor Subsystem (HPS) in Quartus 24.3.1
Good day, I had a working EMIF IP set up and connected to the HPS in Quartus 24.2. I then upgraded to Quartus 24.3.1 and now can no longer get the EMIF IP to compile without errors. I replaced the o...
MM-ATHOccasional Contributor
Occasional ContributorWe had similar problems - if we have checked Compile to VHDL (in Platform Designer/generate HDL). if ve have checked Compile to Verilog, problem gone away.
