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Nicole04's avatar
Nicole04
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1 year ago

Agilex™ 5 EMIF IP for Hard Processor Subsystem (HPS) in Quartus 24.3.1

Good day, I had a working EMIF IP set up and connected to the HPS in Quartus 24.2. I then upgraded to Quartus 24.3.1 and now can no longer get the EMIF IP to compile without errors. I replaced the o...
Fpga Devkit
Nicole04's avatar
Nicole04
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

This is the error I get when trying to generate the example design. It is not available.

Has the updated IP been tested?

  • Nicole04's avatar
    Nicole04
    Icon for Occasional Contributor rankOccasional Contributor
    1 year ago

    I realized that the error disappears when the EMIF (in HPS and EMIF IP parameter settings) is set to 1x32 instead of 2x16.