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Nicole04's avatar
Nicole04
Icon for Occasional Contributor rankOccasional Contributor
11 months ago

Agilex™ 5 EMIF IP for Hard Processor Subsystem (HPS) in Quartus 24.3.1

Good day, I had a working EMIF IP set up and connected to the HPS in Quartus 24.2. I then upgraded to Quartus 24.3.1 and now can no longer get the EMIF IP to compile without errors. I replaced the o...
Fpga Devkit
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
11 months ago

It looks OK. Is this an example design you generated or a design you built yourself? Perhaps try generating the example design and then customize that as needed if you built this manually.

Nicole04's avatar
Nicole04
Icon for Occasional Contributor rankOccasional Contributor
11 months ago

Good day,

This is not an example design; no example design exists for this. The Quartus 24.2 design was based on the development kit and worked. This seems to be either an issue with the latest Quartus (24.3.1) or the updated IP Cores for this version.

If I remove the EMIF then it complains about other HPS pins, such as USB2 not being connected, however it is not something that is done outside of the IP core and the settings show it is connected. This is why I think there may be issues with the HPS IP.