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KWang97's avatar
KWang97
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

After watchdog for dual-config is enabled, the FPGA seems like not work properly every dozens of seconds. Why?

FPGA communicates with another FPGA with PHY chip. Normally(watchdog enable checkbox not checked), the PHY link led is always off when communication is good. While after I enble watchdog for dual-con...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

May I know how do you connect the On Chip Flash IP? Not sure if you are able to follow the connection in my attach design example on connecting the On Chip Flash IP to JTAG to Avalon Master? You may follow the guide in the document in order to run the System Console and update the UFM.

Please let me know if the document is not sufficient.