Forum Discussion
Altera_Forum
Honored Contributor
16 years agoDoes conf_done go high for a while (some µs) or is it always down at the end of the programming?
Maybe your board has not enough power to drive the design in the FPGA? Look at the core voltage (1.2V) and vccd_pll voltage. Is there a fall at the end of the programming? Maybe it isn't a voltage issue but I had once a similar problem...