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Altera_Forum
Honored Contributor
14 years agoAES-128 Sbox - Rom Issue
Hello, I am a student and for my final year project am carrying out an investigation into the hardware implementation of AES-128 in an Altera FPGA - using SystemVerilog. In the AES algorit...
Altera_Forum
Honored Contributor
14 years agoThe solution is to simply use 4 synchronous ROMs, one for each "c". Or actually, 2 since each M*K block has two independent read ports.
So, AFAIK as I can see, you can use M*K blocks for your problem, without performance penalty. To use them, you basically two options. One, you can use a ROM function such as LPM_ROM or ALT_ROM. LPM_ROM is portable, ALT_ROM has more features, such as 2 ports. It will require some changes to your code and you need to write a .HEX/.MIF file for the ROM's contents. The other solution, which I prefer, is to infer the ROM from your code. This will require you to change your code to follow a ROM template Quartus can recognize, which may involve a bit of trial and error. Take a look into the HDL coding guidelines to see which templates are supported and start from a simple case. Also, Quartus may also decide that, despite your efforts, your ROM is best implemented in LUTs.