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Altera_Forum's avatar
Altera_Forum
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9 years ago

Addition wrong Values, DE1-SoC

Hi, I have the De1-SoC board. I wanted to implement an adder on fpga. The data are on the DDR3 of the HPS. I get access to them with a MSGDMA, what is controlled by the HPS. That works fine...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Thank's for your answer.

I have a Top vhdl with the avalon streaming interface. I use the following signals: valid, ready, data

Now I found a way. I changed the Memory from the HPS DDR3 to a on chip memory. One memory is for the input, another for the outputs. Now there are the right values.

Is there somebody who can explain me why i have wrong values with the HPS DDR3 memory?

I am accessing it with the fpga to hps bridge. Linux has a limited memory. So I have no problem with the access.