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Altera_Forum's avatar
Altera_Forum
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12 years ago

Adding a vectored interrupt controller has caused the UART module to stop responding

First, I have a system that is made up of a Nios II/e CPU, JTAG debugger UART, interval timer (sys_clk_timer) and a separate UART module that is used for RS232 serial communication, ect. The system w...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I just ran in debug mode and set a breakpoint at a location where i send transmit data, sending the character one at a time by pressing the run button and having it break before sending another character shows that the component is working properly. I think the problem might have something to do with the UART component being connected to the VIC, and the interval timers also being connected to the VIC. I'm guessing the sys_clk_timer period is not correct, can anyone comment on how to determine what to set the sys_clk_timer period to?