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Altera_Forum
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14 years ago

ADC output from LVDS deserializer.

Hi, I have a an ADC sampling at 40 MHz, and it output LVDS signal, so i have to deserialize it using my DE2-115, but i am having trouble with the deserialized signal (shown in the picture), it ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

What FvW said is reasonable. Maybe add a NOT gate in outclock will resovle the problem.

What kind of the ADC? AFE5851?AFE5801?

The mismatch may between the clock signal and data signal, or the lvds p and lvds n.