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Altera_Forum
Honored Contributor
11 years agoADC JESD204B over xcvr lanes
Hello, I have a development board which has SFP+ cages that are hooked up to the xcvr inputs on a Stratix V FPGA development board. I am wondering if I can receive and decode JESD204B signals ...
Altera_Forum
Honored Contributor
11 years agoIdeally there should not be an issue to connect the IP to the XCVR input lanes because the XCVR lanes should be independent from the IP core. The quick way to verify this would be to get the JESD IP and then try to place at the specific lane that you are targeting. Then run through Fitter compilation. Fitter will help to check against placement rules and restrictions. If the IP not allow, you can try the same method with your custom XCVR ie with Custom PHY or Native PHY.