New Contributor
ContributorHi,
1-- nCS settings
By comparing the waveform of nSTATUS and nCS of the fault board, it seems the configuration failure is caused by the nCS signal being abnormally pulled high.
When nCS cannot be pulled low, AS configuration cannot be started, so that DCLK and nSTATUS signals are not correct.
Please check if there's difference in the nCSO pin between "Good" and "Faulty" boards, including the board connections, settings in Quartus.
2-- Good board's CONFIG_DONE is low, which indicates the Configuration is not done. How do you confirm that those ones are successfully configured? Are you just keep making the FPGA restart configuration?
3-- Can you capture the waveform with all these signals showing in the same screen? From the POR to the time failure happens.
Thanks & Regards,
Xiaoyan
New ContributorHi,
1-- I checked nCSO and nothing changes between the boards.
2-- I left the flash blank to have same conditions on both boards,
so on the good one the fpga was continuosly trying to upload the configuration.
3-- I captured the signals using nSTATUS as the trigger, here they are some images.
I tried to configure the fpga with .sof because it seems like something works,
even if nSTATUS remais low as you ca see in attached images below.
nSTATUS = yellow
nCONFIG= blue
CONFIG_DONE = purple
INIT_DONE = green
Thank you very much Xiaoyan!
