We have an Altera Max 10 FPGA chip on one of our circuit boards. We are able to push code to it using bash script but I have no idea how to perform the following functions now that the code is on the fpga: 1. Connect - Connect to the FPGA and confirm that the connection was established 2. Disconnect - Disconnect from the FPGA and confirm that the connection was terminated 3. Read - Read data from the FPGA 4. Write - Write data to the FPGA 5. Run - Run to code on the FPGA 6. Stop - Stop the code running on the FPGA 7. Version - Read back the version of the code on the FPGA In the past we were able to access these functions via the fs2nios.dll, but since the move to the usb blaster I've been unable to find any documentation on the usbblaster.dll to replicate our old methods of accessing the code on the FPGA. Are these commands available in Quartus 18.1? If so can they be automated using tcl scripts? Is there another recommended software for accessing data from the FPGA after the code has been compiled to it?

Connection how? Thru the JTAG interface, or some other means? By 'push code to it' do you mean program your device thru JTAG? Do you implement some type of custom JTAG interface module in your code?Those functions (read data, write data, etc) are not standard embedded JTAG functions. You would have to define JTAG USER0 and/or USER1 functions that are recognized and implement the appropriate features in your logic.

We're connected by means of a usb blaster cable. By push code I mean program the FPGA using bash script to execute files compiled from Quartus Prime. Our test procedures for communicating with the Altera Max10 FPGA were written back before they were bought by intel and the connection was accomplished via the fs2nios cable. Back then there was documentation (I assume) for the fs2nios.dll which was part the cable driver installation software which enabled us to use those functions. After Intel bought Altera they shifted over to the USB Blaster cable and its software contains dll's that serve the same purpose but I haven't been able to find any documentation on how to use its functions. If it was a simple as swapping out one dll for another I'd be golden but it seems I've got to do things the hard way. With Xilinx FPGA's you can alter configurations of the FPGA to get it to perform its necessary functions on the physical level, then write/read to certain I/O elements to perform debugging and diagnostic functions in conjuction with the tasks being performed by the FPGA's physical layer. I'm looking to do something similar with the Altera Max10 FPGA. I found documentation about the external memif toolkit that has a bunch of the functions I'm looking for such as establish_connection (::quartus::external_memif_toolkit) terminate_connection (::quartus::external_memif_toolkit) read_setting (::quartus::external_memif_toolkit) apply_setting (::quartus::external_memif_toolkit) run_connection_command (::quartus::external_memif_toolkit) get_connection_commands (::quartus::external_memif_toolkit) get_connection_info (::quartus::external_memif_toolkit) I have experience using Xilinx and NI FPGA's but unfortunately flavor of them is all very new to me so please forgive me if I confuse you with incorrect terminology. Let me know if I'm on the right track as far as communicating with the FPGA for testing/debugging purposes or if there's a much easier way to accomplish what I'm setting out to do. Thanks!

Well somebody from Intel will have to followup as I have no expertise in the area that you are having issues with. Sorry.

Hi AustinTatious, Allow me some time to look into your issue. I shall come back to you with the findings.

Hello, I guess you are using Linux environment to run the FPGA programming/configuration. If you are using USB Blaster II programming cable to program/config the FPGA over JTAG connector/protocol, it is an easy task. You can use Quartus Programmer tool to program/config the FPGA from your laptop. User guide : https://www.intel.com/content/www/us/en/docs/programmable/683039/21-3/programmer-user-guide.htmlIs this what you looking for? regards,Farabi

Accessing code on a Max10 FPGA | Altera Community

14 Replies

AustinTatious
New Contributor
3 years ago
I'm aware that FS2 is no longer in business and that the associated software does not work on newer computers. What I'm attempting to do is replicate the functionality of the old code using the most recent methodology. We have tcl code that uses the system-console.exe to perform the actions needed but my current problem is that those methods use the master_write_32, master_read_32 functions pretty extensively. The arguments are "service-path", "address", and "values". The service paths were being populated by the "get_service_paths master" command, but currently when the device is plugged in we see the devices in "get_service_paths devices" but nothing when we try "get_service_paths master" which causes none of our functions to work. I'm trying to debug why my master service paths are populating. I have access to the .pof and .sof files but nothing else, and I'm trying to figure out what to ask for from our development team and when I get it where to check to ensure that the master services are initiated.
FvM
Super Contributor
3 years ago
Thanks for the explanation. So you expect that these functions should be working with the genuine Quartus system console. Unfortunately I'm not working with SOPC Builder, but there should be a documentation.
FakhrulA_altera
Regular Contributor
3 years ago
Hi AustinTatious,

Can we have a short meeting via Teams?
We will discuss this further there and I will send you the invitation to your email.

Regards,
Fakhrul

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Accessing code on a Max10 FPGA

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