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Altera_Forum
Honored Contributor
15 years agoI thought someone posted VHDL master templates somewhere but I can't find them. Here are some old ones in verilog that let you shovel data in/out of an SOPC Builder system from the outside world: http://www.altera.com/support/examples/nios2/exm-avalon-mm.html These are meant for DMA types of accesses but you should be able to use them to move a word of data at a time assuming you don't mind some FIFO latency in your data path.