About the "High-Speed I/O Specification" in Stratix5 datasheet

Table36 in the datasheet lists the high-speed I/O specifications for stratix5 devices, does this mean differential high-speed I/O only? what about single-ended I/O speed?

I want to implement a 32bit*312.5MHz single-ended interface, can anyone recommend an FPGA model for me? tks!