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Altera_Forum
Honored Contributor
Honored ContributorAbout the cycloneIII IO output speed
hi everybody I'm trying to use the EP3C25F324C8 to generate 250MHz clock as high speed AD（AD9481） clock，could it work？I don't know if the user IO (3V3 LVTTL)or PL...
Altera_ForumHonored Contributor
Honored Contributorsetup an empty quartus project with your target fpga selected, you can use the web edition
then start the megacore wizzard and try to setup a pll with your input clock and output clock, then you will see what frequency this device will be able to generate. but what fmax you will reach with your design is a different thing.
