About JTAG uart time serials /chronogenesis ?

Question

i wanna translate files from a embeded platform to FPGA via its JTAG_uart module;

then there is a program that read data from jtag_uart device/file on the FPGA ,

so the problem is how to program to send data on my embeded plat,

and how to control the four jtag_lines (tck/tms/tdi/tdo)(for embeded plat ,they are general I/O pins),or what timing sequence about the singnals..

thanks for anyone's reply and sorry for my poor english

altera_forum · Answer

i want to program epcs via jtag,i have a microcontroller(LPC),a FPGA(EPCS IV),EPCS64;now my solution :

1) Configure the FPGA via Jrunner (use .rbf that contains nios os and a onchipmemory.hex that read data from jtag_uart and write epcs_controller )

2)transe data to the FPGA via JTAG_uart(nios running ,jtag changed jtag_uart)

now my problem is that how to transe data to the jtag_uart, and the chronogenesis of the jtag _uart?

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