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Altera_Forum
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14 years ago

about external pll in lvds_rx and lvds_tx

i am new to lvds mega in quartus . i wanna know that what is the difference between using internal pll and external pll,since there is an option in the lvds_tx, lvds_rx general pannel. which kind co...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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I send the data and the fast clock of altlvds_tx to the altlvds_rx. The connection is tx_inclk ------> rx_inclk, tx_out----------------> rx_in.The altlvds works, but the data received is not right.

Any suggestion to solve the problem ? And could my method work well ?

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If you do it right, it will work well.

Have you simulated your design in Modelsim?

Are you sending a frame clock to frame your LVDS data? For example, if you are serializing 8:1, and then deserializing 1:8, you should be sending a frame clock that is 1/8th of the data rate.

Have you ensured that your LVDS receivers have terminations?

Cheers.

Dave