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Yamada1's avatar
Yamada1
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

About Arria10 Embedded Memory rden signal

It would be helpful if you could tell us the following points about the rden signal input to the RAM block. 1) Reading is valid when rden is 'H', but is the read address latched even if rden is 'L'...
  • RichardT_altera's avatar
    RichardT_altera
    3 years ago

    Yes, the data output retains the previous values that are held during the most recent active read enable. Which is dout0.

    You can see the same thing in figure 4 as well.

    No worry. I am happy to help.

    Best Regards,

    Richard Tan

    p/s: Please do expert delay in response due to lunar new year.

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Thank you for acknowledge the solution provided.


I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to https://supporttickets.intel.com, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.