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Altera_Forum's avatar
Altera_Forum
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16 years ago

a strange problem!

module zhengxing(clk_200M, rst, data_in, data_out ); input clk_200M; input rst; input data_in; output data_out; reg data_out; reg [2:0]counter; reg [1:0]state; parameter low...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Your code should work, and the data_out should react on the change of data_in. There are a number of possible causes that you should make sure to work:

1) Check that the polarity of the rst signal is OK as pletz suggests. (You seem to have done this).

2) Make sure that your clock speed is not too high. 200MHz is high for a Cyclone-II. It depends on the specific configuration of your circuit if this will work or not...

3) Make sure that the output can change as pletz suggested. (You seem to have checked this too).

4) You should check that your data_in signal is OK. You could test your design by having data_in connected to a switch, the state to two LEDs and the data_out to a LED. You should be able to see the states of the wait_high and wait_low when you push on the data_in button. Your data_out LED should follow your data_in button.

Hope this helps