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Altera_Forum
Honored Contributor
17 years agoa strange problem!
module zhengxing(clk_200M, rst, data_in, data_out ); input clk_200M; input rst; input data_in; output data_out; reg data_out; reg [2:0]counter; reg [1:0]state; parameter low...
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- this io is well !and i connect the input pin to output pin 'data_out' ,the wave is the same as the input pin, so i don't think the pin has problem! --- Quote End --- Hi, I assume that the code represents the whole design ??? If yes, please post your project in the forum. Kind regards Gerd