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Altera_Forum
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16 years ago

A problem with using DCFIFO (lpm_fifo)

Hello! In my design I have a 8bit x 4 words dual-clock fifo component (LPM_FIFO+) and I observe a very strange behaviour or the wrfull output signal. Since I have fifo 4 word-deep I expect...
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Altera_Forum
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15 years ago

NO, I am not using Nios, I also do not use any communication CORE. The physical connection I have right now is the USB that is used to upload the SOF file or the flash with programs, as well as debugging, etc. I was intending to use it as my USB connection and get a USB core, but I learned that it doesn't connect to the FPGA pins, and I have to get an extra USB connection. My problem is that the only HSMC connection available is occupied with a board from BiTec that I am using in my desgin, there is no other connection else the 10 PINs of the boundary scan available. I tried to find any product in the market to expand the HSMC to add another board to include USB, I couldn't find any so far. Can I survive with just a FIFO and UART or serial connection? My design needs to reconfigured at run-time, but few bytes and no speed is necessary.