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Honored Contributor
Honored ContributorA erratic phenomenon of FIFO in FPGA
Hello, I am using megawizard to generate a fifo of 8bitsx1024words in EP3C16. An interesting result occurs, when fifo is full(wrfull=1), it at the same time indicates that there is no data to r...
Altera_ForumHonored Contributor
Honored Contributorwell, i am not clear what the speciall meaning is for half full reading.
in fact, i begin to read fifo when rdusedw=204. that's, if fifo buffers data greater than 204-byte, reading operation starts. or else, it is waiting. it that not optimal?
