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Altera_Forum's avatar
Altera_Forum
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8 years ago

5.8GHz PLL output from Cyclone V?

From an early look at Cyclone V documentation it appears that a PLL could be configured for an output of 5.775GHz. Is this correct? Can the output be ported to a differential output of the chip?
Altera_Forum's avatar
Altera_Forum
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8 years ago

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Hi,

Not supported.

Cyclone V supports PLL input clock range of 5MHz to 670MHz.

https://www.altera.com/en_us/pdfs/li...v/cv_51002.pdf

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

--- Quote End ---

Thanks, Anand. Sorry for the confusion. My real question is about the output frequency of the PLL. Can it go up to 5.775 GHz, and can it be pumped out of the chip on a differential output like LVDS?

Regards,

Glenn